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958 IP
851
0.118
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process...
852
0.118
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad.
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad....
853
0.118
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip...
854
0.118
LVDS Transmitter 700Mbps; UMC 28nm HPC Process
LVDS Transmitter 700Mbps; UMC 28nm HPC Process...
855
0.118
LVDS Transmitter IP, 8MHz - 100MHz, 4 channels, UMC 0.18um G2 process
3.3V 4 channel LVDS Transmitter 8~100MHz, UMC 90nm SP/RVT Low-K process....
856
0.118
LVDS Transmitter IP, 8MHz - 135MHz, 4 channels, UMC 0.13um SP/FSG process
2.5V 4 channel LVDS Transmitter 8~135MHz, UMC 90nm SP/RVT Low-K process....
857
0.118
LVDS Transmitter IP, 1200Mbps, UMC 55nm SP process
1.8V Sub-LVDS Transmitter 1200Mbps, UMC 40nm LP/RVT Logic process....
858
0.118
LVDS Transmitter IP, 16MHz - 178MHz, UMC 55nm SP process
2.5V LVDS Transmitter 16~178MHz, UMC 55nm SP/RVT Low-K Logic process....
859
0.118
LVDS Transmitter IP, 700Mbps, UMC 0.13um SP/FSG process
3.3V LVDS Transmitter 700Mbps, UMC 90nm SP/RVT low-L process....
860
0.118
LVDS Transmitter IP, 700Mbps, UMC 55nm SP process
2.5V LVDS Transmitter 700Mbps, UMC 40nm LP Low-K Logic process....
861
0.118
LVDS Transmitter IP, 700Mbps, UMC 90nm SP process
3.3V LVDS Transmitter 700Mbps, UMC 55nm SP/RVT Low-K process....
862
0.118
LVDS Transmitter IP, 700Mbps, UMC 90nm SP process
2.5V LVDS Transmitter 700Mbps, UMC 55nm SP Low-K Logic process....
863
0.118
LVDS Transmitter IP, 85MHz, UMC 55nm SP process
1.8V/3.3V 85MHz 35:5 LVDS Transmitter, UMC 0.18um GII Logic process....
864
0.118
LVDS Transmitter IP, 8MHz - 135MHz , UMC 0.13um HS/FSG process
8M~135MHz DLL-based LVDS TX, UMC 0.13um HS/FSG process....
865
0.118
LVDS Transmitter IP, 8MHz - 135MHz, UMC 90nm SP process
2.5V LVDS Transmitter 8~135MHz, UMC 90nm SP process....
866
0.118
LVDS Transmitter IP, Tx IO, UMC 55nm SP process
0.18um TX PAD, UMC 0.18um Logic RVT-FSG process....
867
0.118
LVDS Tx IO IP, 1.25GHz, UMC 90nm SP process
Single Port LVDS Transmitter PAD 1.25Gbps, UMC 90nm SP/RVT Low-K process....
868
0.118
LVDS Tx IO IP, UMC 0.35um Logic process
0.13um LVDS TX IO PAD, UMC 0.13um HS/HVT-FSG process....
869
0.118
LVDS Tx IO IP, UMC 90nm SP process
LVDS TX Pad, UMC 0.35um Logic process....
870
0.0
1 Gbps LVDS Transmitter
The interface to the core logic includes signal pin (INP) to transmit data and control pin ( EN) to configure the state of the transmitter. There are ...
871
0.0
2 Gbps Rail to Rail LVDS receiver
065TSMC_LVDS_10 is LVDS receiver with rail to rail input range. EN_T enables 100 Ohm internal resistor. The CAL_T adjusts 100 Ohm internal resistor, t...
872
0.0
V-by-One Tx IP, Silicon Proven in SMIC 40LL
V-by-One HS technology targets a high-speed data transmission of video signals based on the internal connection of equipment. V-by-One® HS Standard de...
873
0.0
3.125 Gbps DDR 1-channel CML transmitter
065TSMC_CML_02 core logic interface includes signal pins (INP1, INP2 and INN1, INN2) for data transmission, control pin EN_TX to configure transmitter...
874
0.0
3.125 Gbps DDR CML receiver
065TSMC_CML_01 core logic interface includes complementary output signal pins (OUTp, OUTn) for data transmission and enable pin EN_RX. PAD_INP and PAD...
875
0.0
1.2 Gbps LVDS transmitter/receiver
The interface to the core logic in receiver mode includes the signal pins (out_p and out_n) to receive data and the control pins (en_rx, ten, t_cal ar...
876
0.0
1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI
The MXL-LVDS-RX-4CH is a high performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel data are org...
877
0.0
1.25 Gbps LVDS IPs library
028TSMC_LVDS_01 is a library including: • Transmitter LVDS driver (TX_LVDS); • Receiver LVDS driver (RX_LVDS); • Reduced range link receiver LVDS...
878
0.0
1.25 Gbps LVDS IPs library
040TSMC_LVDS_01 is a library including: • Transmitter LVDS driver (LVDS_TX); • Receiver LVDS driver (LVDS_RX); • Reference current/voltage source (...
879
0.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spac...
880
0.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...
881
0.0
3.3V Wide-Range General Purpose Inline I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...
882
0.0
7.5 Gbps DDR CML IPs library
040TSMC_CML_01 is a library including: • CML receiver (CML_RX); • CML transmitter (CML_TX). • Reference current/voltage source (CML_RS); • Refe...
883
0.0
2.5V 5V Tolerant GPIO Inline IO Pad Set
The 3.3V General Purpose I/O (5VT) library provides programmable bidirectional I/O’s that are both 5V tolerant and fault tolerant. The I/O’s are prov...
884
0.0
2.5V 5V Tolerant GPIO Staggered IO Pad Set
The 3.3V General Purpose I/O (5VT) library provides programmable bidirectional I/O’s that are both 5V tolerant and fault tolerant. The I/O’s are prov...
885
0.0
2.5V General Purpose Inline IO Pad Set
A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and separate I/O padring ...
886
0.0
2.5V General Purpose Staggered IO Pad Set
A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and separate I/O padring ...
887
0.0
1.8V Secondary Oxide LVDS pad - TSMC 7nm 7FF,FF+
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
888
0.0
200 Mbps LVDS IP library
055TSMC_LVDS_03 is a library including: • Transmitter LVDS driver (TX_LVDS); • Receiver LVDS driver (RX_LVDS); • Reference current/voltage genera...
889
0.0
500Mbps LVDS IP library
180TSMC_LVDS_10 is a library including: • Transmitter LVDS driver (TX_LVDS); • Receiver LVDS driver (RX_LVDS); • Transceiver LVDS driver (R...
890
0.0
666 Mbps LVDS Transceiver IP
The MXL-TXRX-LVDS is a LVDS transceiver implemented in digital CMOS technology. It supports up to 666 Mbps. It is compatible with IEEE Std 1596, EIA-6...
891
0.0
PAD - HHGrace 110nm ULL
...
892
0.0
Rail to rail LVDS receiver 1 Gbps
LVDS_RX is LVDS receiver with rail to rail input range. The interface to the core logic includes the output signal pin (OUTp) to receive data and the ...
893
0.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling. Fault-tolerant operation. This library is offere...
894
0.0
DDR combo IO in SMIC 28HKC+, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
895
0.0
DDR combo IO in SMIC 28HKD 0.9/1.8V, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
896
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR2,3/LPDDR2,3, upto 1600Mbps for IOT application
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
897
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR3,4/LPDDR3,4, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
898
0.0
DDR combo IO in SMIC 40NLL, supporting DDR2,3/LPDDR2,3, upto 1333Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
899
0.0
DDR combo IO in SMIC 40NLL, supporting DDR3,3U,3L,4/LPDDR2,3, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
900
0.0
DDR combo IO in SMIC 55NLL, supporting DDR2/3/3L /LPDDR2/3, upto 1333Mbps
Brite DDR IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200Mbps to 4805Mbps. Brite p...
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